The present invention generally relates to fabrication of semiconductor integrated circuits on semiconductor wafer substrates and more particularly, to an apparatus and method for eliminating or reducing particle flux and contamination caused by flow of air between processing chambers of disparate pressures during semiconductor wafer processing.
Generally, the process for manufacturing integrated circuits on a silicon wafer substrate typically involves deposition of a thin dielectric or conductive film on the wafer using oxidation or any of a variety of chemical vapor deposition processes; formation of a circuit pattern on a layer of photoresist material by photolithography; placing a photoresist mask layer corresponding to the circuit pattern on the wafer; etching of the circuit pattern in the conductive layer on the wafer; and stripping of the photoresist mask layer from the wafer. Each of these steps provides abundant opportunity for organic, metal and other potential circuit-contaminating particles to accumulate on the wafer surface as well as on the interior surfaces of the process chambers in which the processes are carried out.
As an example, CVD processes include thermal deposition processes, in which a gas is reacted with the heated surface of a semiconductor wafer substrate, as well as plasma-enhanced CVD processes, in which a gas is subjected to electromagnetic energy in order to transform the gas into a more reactive plasma. Forming a plasma can lower the temperature required to deposit a layer on the wafer substrate, to increase the rate of layer deposition, or both. However, in plasma process chambers used to carry out these various CVD processes, materials such as polymers are coated onto the chamber walls and other interior chamber components and surfaces during the processes. These polymer coatings frequently generate particles which inadvertently become dislodged from the surfaces and contaminate the wafers.
In semiconductor production, the quality of the integrated circuits on the semiconductor wafer is directly correlated with the purity of the fabricating processes, which in turn depends upon the cleanliness of the manufacturing environment. Furthermore, technological advances in recent years in the increasing miniaturization of semiconductor circuits necessitate correspondingly stringent control of impurities and contaminants in the plasma process chamber. When the circuits on a wafer are submicron in size, the smallest quantity of contaminants can significantly reduce the yield of the wafers. For instance, the presence of particles during deposition or etching of thin films can cause voids, dislocations, or short-circuits which adversely affect performance and reliability of the devices constructed with the circuits.
Particle and film contamination has been significantly reduced in the semiconductor industry by improving the quality of clean rooms, by using automated equipment designed to handle semiconductor substrates, and by improving techniques used to clean the substrate surfaces. However, as deposit of material on the interior surfaces of the processing chamber remains a problem, various techniques for in-situ cleaning of process chambers have been developed in recent years. Cleaning gases such as nitrogen trifluoride, chlorine trifluoride, hexafluoroethane, sulfur hexafluoride and carbon tetrafluoride and mixtures thereof have been used in various cleaning applications. These gases are introduced into a process chamber at a predetermined temperature and pressure for a desirable length of time to clean the surfaces inside a process chamber. However, these cleaning techniques are not always effective in cleaning or dislodging all the film and particle contaminants coated on the chamber walls. The smallest quantity of contaminants remaining in the chamber after such cleaning processes can cause significant problems in subsequent manufacturing cycles.
FIG. 1 illustrates a typical conventional integrated cluster tool 10 for the local multi-step processing of wafers 30 in the fabrication of integrated circuits on the wafers 30. The tool 10 includes a pair of loadlock chambers 12 each of which receives a wafer cassette 32 loaded with wafers 30. A wafer transfer robot 22, provided inside a central transfer chamber 20, individually unloads each wafer 30 from one of the loadlock chambers 12 and transfers the wafer 30 first to a wafer orientation chamber 14 and then sequentially to multiple processing chambers 16. In the processing chambers 16, a variety of semiconductor fabrication processes, including chemical vapor deposition, physical vapor deposition, ion sputtering and etching, for example, are carried out on each wafer 30. The processes carried out in the processing chambers 16 are conducted under various pressures, depending upon the particular process parameters required for each process. Accordingly, a vacuum system (not shown) maintains the process chambers 16 typically at a lower pressure than the pressure that is maintained in the wafer transfer chamber 20. These pressures are typically on the order of about 4-80 mTorr. After processing of each wafer 30 in the process chambers 16 is completed, the wafer transfer robot 22 places each wafer 30 in a cool down chamber 18, and then, returns the wafer 30 to the cassette 32 in the other cool down chamber 12. Finally, the cassette 32 is transported to another processing station (not shown) in the facility for further processing of the wafers 30 therein.
During sequential transfer of each wafer 30 from one processing chamber 16 to the next processing chamber 16 in the processing sequence, the wafer transfer robot 22 removes the wafer 30 from one processing chamber 16, re-positions the wafer 30 in the transfer chamber 20 and then places the wafer 30 in the adjacent processing chamber 16, respectively. As shown in FIG. 2, a wafer transfer gate opening 26, which is reversibly closed by a gate door 28, is provided in the chamber wall 24 that divides the transfer chamber interior 21 from the process chamber interior 17 of each process chamber 16. During processing of each wafer 30 in the process chamber interior 17, the gate door 28 is closed, as shown in phantom, to sustain partial vacuum pressures inside the process chamber interior 17 while typically maintaining a higher pressure in the transfer chamber interior 21. Before transfer of the wafer 30 from one processing chamber 16 to the next processing chamber 16, the gate door 28 is opened to expose the wafer transfer gate opening 26 so that the wafer transfer robot 22 can transfer the wafer 30 from the process chamber interior 17 and back into the transfer chamber interior 21, prior to transfer of the wafer 30 into the next processing chamber 16 in the processing sequence.
As heretofore noted, during processing of the wafers 30 in each of the process chambers 16, various polymer and other impurities have a tendency to accumulate on the chamber walls in the process chamber interior 17. Upon opening of the gate door 28, the higher-pressure air inside the transfer chamber interior 21 has a tendency to rush into the lower-pressure process chamber interior 17. The flowing air dislodges particulate impurities from the chamber walls in the process chamber 16, and these have a tendency to fall on the wafer 30, potentially contaminating the devices being fabricated on the wafer 30. Accordingly, a device is needed for slowly equalizing air pressures between chambers of disparate air pressures prior to opening a wafer transfer gate door between the chambers, in order to prevent the rush or flow of air from the higher-pressure chamber to the lower-pressure chamber that would tend to dislodge potential device-contaminating particles from the walls of the lower-pressure chamber.
An object of the present invention is to provide a method and device for gradually equalizing air or gas pressures between two chambers.
Another object of the present invention is to provide a device which is suitable for substantially equalizing air or gas pressures between two chambers prior to transfer of a substrate from one of the chambers to the other chamber.
Another object of the present invention is to provide a device which substantially reduces particle contamination of substrates.
Yet another object of the present invention is to provide a method of reducing particle contamination of a substrate prior to or during transfer of the substrate between the chambers.
Still another object of the present invention is to provide a device which is suitable for providing a gradual flow of air or gas from a higher-pressure process chamber to a lower-pressure process chamber prior to transfer of a substrate between the chambers.
Yet another object of the present invention is to provide a method for gradually equalizing pressures between chambers of disparate interior air or gas pressures in order to prevent or reduce gas flow-induced particle contamination of a substrate upon transfer of the substrate between the chambers.
A still further object of the present invention is to provide a device which utilizes a filter or molecular sieve which facilitates the gradual passage of air or gas from one chamber to another chamber prior to opening a transfer gate between the chambers and transferring a substrate from one chamber to the other chamber.
In accordance with these and other objects and advantages, the present invention is generally directed to a method and device for gradually equalizing air or gas pressures between substrate processing chambers prior to transfer of a substrate between the chambers. The device comprises a gas flow restrictor provided in the chamber wall that separates the chambers. A door typically reversibly seals the gas flow restrictor. During substrate processing in one of the chambers, the gas flow restrictor is sealed to maintain a partial vacuum pressure in the chamber. Prior to opening the wafer transfer gate between the chambers, the gas flow restrictor door is opened to facilitate the gradual flow of air or gas from the higher-pressure chamber, through the gas flow restrictor to the lower-pressure chamber and substantially equalize the pressures in the respective chambers, such that a sudden rush or flow of air or gas between the chambers upon opening of the wafer transfer gate, is prevented.